Overview

• Datapath sequential design
• Timing
• Pipelining

Datapath Sequential Design

Example: 5-bit counter w/ reset

---------------------------------
|                               | 
|---ADD----MUX0--y^{n+1}--DQ--------y^n
1---|    0-MUX1
             |
             r

(Could easily modify to also do down counting)

In general, we have some combinational logic, a multiplexer, a register, all fed back into the combinational logic.

Data in, data out and control signals

Control has input and output. When control “talks to” data path, command. Returns, status.

Example: Timer

---------------------------------
|                               | 
|---[-1]---MUX0-------DQ--------|--[=0]-|-Done
   Input---MUX1                         |
       0---MUX2                         |
             |---------------------------
   User-->Control-->

Example: Left/right shift register

---------------------------------
|                               | 
|------*-[SHL]---MUX0-------DQ-------Output
       |                                      
Input--*-[SHR]---MUX1                         
             0---MUX2                         
                  |
       Reset-->Control
       Left/Right

Serial to parallel conversion

Example: 8-bit multiplier